Title :
On the design of high-speed high-resolution track and holds
Author :
Caiulo, G. ; Fiocchi, C. ; Gatti, U. ; Maloberti, F.
Author_Institution :
Design Center, Italtel Soc. Italiana Telecommun. SpA, Milan, Italy
Abstract :
This paper relies on design strategies for high-speed high-resolution Track and Hold circuits intended as front end of A/D converters for advanced applications. A comparison between two conventional topologies is presented and an analysis of their main non-idealities is carried out. An improved Track and Hold is also presented. It achieves 14 bits of THD with a 40 MHz sinewave sampled at 320 MHz, when a 20 GHz submicron npn bipolar technology is used for simulations. The sampling pedestal error is lower than 100 μV
Keywords :
analogue-digital conversion; bipolar integrated circuits; integrated circuit design; sample and hold circuits; A/D converter; THD; design; high-speed high-resolution track and hold circuit; nonideality; sampling pedestal error; simulation; submicron npn bipolar technology; topology; Bridge circuits; Capacitors; Circuit simulation; Circuit topology; Diodes; Insulation life; Sampling methods; Variable structure systems; Voltage; Wideband;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.539811
