Title :
A digitally calibrated current-mode two-step flash A/D converter
Author :
Oliveira, J.P. ; Vital, J. ; Franca, J.E.
Author_Institution :
Inst. Superior Tecnico, Lisbon, Portugal
Abstract :
This paper describes a digitally calibrated high-speed current-mode two-step flash ADC architecture for implementation in digital CMOS technology. The generation of errors to be digitized for calibration is achieved through an adequate configuration of the internal DAC, residue amplifier and flash ADC. Predominant digital processing ensures enhanced robustness against process tolerances and inherent errors. Simulation results for a 0.7 μm CMOS prototype show that sampling rates up to 40 MHz are achievable for full 10-bit resolution
Keywords :
CMOS integrated circuits; analogue-digital conversion; calibration; 0.7 micron; 40 MHz; digital CMOS technology; digital calibration; errors; high-speed current-mode two-step flash A/D converter; process tolerances; sampling rate; CMOS digital integrated circuits; CMOS integrated circuits; CMOS technology; Calibration; High speed integrated circuits; Integrated circuit technology; Robustness; Signal resolution; Signal sampling; Virtual prototyping;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.539863
