Trade-off evaluation in embedded system design via co-simulation

Author

Passerone, Claudio ; Lavagno, Luciano ; Sansoè, Claudio ; Chiodo, Massimiliano ; Sangiovanni-Vincentelli, Albert

Author_Institution

Dipt. di Elettronica, Politecnico di Torino, Italy

fYear

1997

fDate

28-31 Jan 1997

Firstpage

291

Lastpage

297

Abstract

Current design methodologies for embedded systems often force the designer to evaluate early in the design process architectural choices that will heavily impact the cost and performance of the final product. Examples of these choices are hardware/software partitioning, choice of the micro-controller, and choice of a run-time scheduling method. This paper describes how to help the designer in this task, by providing a flexible co-simulation environment in which these alternatives can be interactively evaluated

Keywords

circuit analysis computing; microcontrollers; real-time systems; cosimulation; cost; design methodologies; design process architectural choices; embedded system design; flexible cosimulation environment; hardware/software partitioning; microcontroller; performance; run-time scheduling method; Analytical models; Computer architecture; Costs; Design methodology; Embedded system; Hardware; Mathematical analysis; Process design; Processor scheduling; Runtime;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific

Conference_Location

Chiba

Print_ISBN

0-7803-3662-3

Type

conf

DOI

10.1109/ASPDAC.1997.600159

Filename

600159