Title :
Two IP protection schemes for multi-FPGA systems
Author :
Gaspar, L. ; Fischer, V. ; Guneysu, Tim ; Jouini, Z.C.
Author_Institution :
Lab. Hubert Curien, Univ. of Lyon, St. Etienne, France
Abstract :
This paper proposes two novel protection schemes for multi-FPGA systems providing high security of IP designs licensed by IP vendors to system integrators and installed remotely in a hostile environment. In the first scheme, these useful properties are achieved by storing two different configuration keys inside an FPGA, while in the second scheme, they are obtained using a hardware white-box cipher for creating a trusted environment. Thanks to the proposed principles, FPGA configurations coming from different IP owners cannot be cloned or reverse-engineered by any involved party, including system integrator and other IP owners. The proposed schemes can be directly implemented in recent FPGAs such as Xilinx Spartan 6 and Virtex 6.
Keywords :
IP networks; field programmable gate arrays; trusted computing; FPGA configurations; IP design security; IP protection schemes; IP vendors; Virtex 6; Xilinx Spartan 6; hardware whitebox cipher; hostile environment; multiFPGA systems; reverse engineer; trusted environment; Ciphers; Field programmable gate arrays; IP networks; Licenses; Ports (Computers); IP protection schemes; licensing; white-box cipher;
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4673-2919-4
DOI :
10.1109/ReConFig.2012.6416790