Tunneling path impact on semi-classical numerical simulations of TFET devices

Author

De Michielis, Luca ; Iellina, Matteo ; Palestri, Pierpaolo ; Ionescu, Adrian M. ; Selmi, Luca

Author_Institution

Nanoelectronic Devices Lab. (Nanolab), Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland

fYear

2011

fDate

14-16 March 2011

Firstpage

1

Lastpage

4

Abstract

In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path.

Keywords

Monte Carlo methods; field effect transistors; numerical analysis; silicon-on-insulator; tunnel transistors; tunnelling; DG TFET architecture; SOI; TFET device; full-band Monte Carlo simulator; nonlocal band-to-band tunnelling model; semiclassical numerical simulation; tunnel FET structure; Computational modeling; Electric fields; Electric potential; Logic gates; Semiconductor process modeling; Silicon; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Ultimate Integration on Silicon (ULIS), 2011 12th International Conference on

Conference_Location

Cork

Print_ISBN

978-1-4577-0090-3

Electronic_ISBN

978-1-4577-0089-7

Type

conf

DOI

10.1109/ULIS.2011.5758002

Filename

5758002