DocumentCode :
3021101
Title :
A low-power MMSE MIMO detector using dynamic voltage wordlength scaling for 4×4 MIMO-OFDM systems
Author :
Kim, Jaeseong ; Yoshizawa, Shingo ; Miyanaga, Yoshikazu
Author_Institution :
Grad. Sch. of Inf. Sci. & Technol., Hokkaido Univ., Sapporo, Japan
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
2793
Lastpage :
2796
Abstract :
This paper presents a low-power MMSE MIMO detector using a dynamic voltage wordlength scaling (DVWS) technique for 4×4 MIMO-OFDM systems. A MIMO MMSE detector requests high performance computing for real-time processing. A pipelined MMSE detector using Strassen´s algorithm has been developed in our previous work. However, it consumes significant power and thus, we have to consider a low-power solution to minimize power dissipation. We propose a DVWS MIMO detector which changes a wordlength and a supply voltage simultaneously with fixed clock frequency. The proposed technique can keep fixed throughput unlike dynamic voltage frequency scaling (DVFS). The power result of the DVWS MMSE detector ranged from 232 to 717 mW depending on communication situations.
Keywords :
MIMO communication; OFDM modulation; least mean squares methods; low-power electronics; multiprocessing systems; pipeline processing; DVFS; DVWS MIMO detector; DVWS technique; MIMO MMSE detector; MIMO-OFDM systems; Strassen algorithm; dynamic voltage frequency scaling; dynamic voltage wordlength scaling; high performance computing; low-power MMSE MIMO detector; minimize power dissipation; pipelined MMSE detector; real-time processing; Clocks; Delay; Detectors; Fading; MIMO; OFDM; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271890
Filename :
6271890
Link To Document :
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