Title :
A 1-V 1.1-MHz BW digitally assisted multi-bit multi-rate hybrid CT ΣΔ with 78-dB SFDR
Author :
Belotti, Oscar ; Bonizzoni, Edoardo ; Maloberti, Franco
Author_Institution :
Dept. of Electron., Univ. of Pavia, Pavia, Italy
Abstract :
A second-order multi-bit hybrid continuous-time (CT) ΣΔ modulator has been implemented in a 65-nm CMOS technology. The circuit ensures jitter immunity granted by the use of multi-rate switched-capacitor (SC) DACs. An auxiliary digital assistance technique reduces integrators output swing. The modulator provides 10.8 bits of resolution over a signal bandwidth of 1.1 MHz and a spurious free dynamic range (SFDR) of 78 dB. The chip draws 1.1 mW from a 1-V supply.
Keywords :
CMOS digital integrated circuits; digital-analogue conversion; jitter; sigma-delta modulation; switched capacitor networks; BW digitally assisted ΣΔ modulator; CMOS technology; auxiliary digital assistance; bandwidth 1.1 MHz; jitter immunity; multibit multirate hybrid CT ΣΔ modulator; multirate switched-capacitor DAC; power 1.1 mW; second-order multibit hybrid continuous-time modulator; size 65 nm; voltage 1 V; Ash; Bandwidth; Clocks; Feedforward neural networks; Gain; Modulation; Noise;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6271918
