DocumentCode :
3021998
Title :
Single Event Gate Rupture Testing on 22A Gate Oxide Structures from a 90nm Commercial CMOS Process
Author :
Lawrence, Reed K.
Author_Institution :
BAE Syst., Manassas, VA
fYear :
2008
fDate :
14-18 July 2008
Firstpage :
76
Lastpage :
81
Abstract :
Single event gate rupture (SEGR) testing on existing 22A gate oxide structures from a commercial 90 nm electrical characterization drop-in test-site indicate that classical SEGR, as defined as catastrophic gate oxide breakdown, was not detected. Results in this work do show cumulative gate oxide degradation which increases in relation to heavy ion LET exposure.
Keywords :
CMOS integrated circuits; integrated circuit testing; radiation hardening (electronics); 22A gate oxide structure; CMOS process; catastrophic gate oxide breakdown; drop-in test-site; single event gate rupture testing; size 90 nm; CMOS process; CMOS technology; Circuit testing; Leak detection; Leakage current; Manufacturing; Materials testing; Semiconductor device testing; Space technology; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation Effects Data Workshop, 2008 IEEE
Conference_Location :
Tucson, AZ
Print_ISBN :
978-1-4244-2545-7
Type :
conf
DOI :
10.1109/REDW.2008.20
Filename :
4638618
Link To Document :
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