Synthesizing self-testable filters via scaling and redundant operator elimination

A synthesis-based approach to improving the testability of digital filters is presented, with the aim of producing designs that achieve very high fault coverage under low-overhead built-in self-test methodologies. The synthesis-based approach permits high coverages to be achieved without the addition of special test hardware or other manipulation of the gate-level netlist. The testability of a design is enhanced at the register-transfer level (RTL), prior to synthesis. Using scaling as a redundancy elimination technique, it is possible to reduce the area required by a design, as well as identify further redundancies that can be eliminated through the automatic selection of optimized RTL structures drawn from a parameterized VHDL library.