Title :
Power-scalable multi-mode reconfigurable continuous-time lowpass/quadrature bandpass sigma-delta modulator for zero/low-IF receivers
Author :
Xu, Yang ; Chi, Baoyong ; Wang, Zhihua
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
A multi-mode reconfigurable wideband continuous-time lowpass/quadrature bandpass sigma-delta (CT LP/QBP ΣΔ) modulator employing power scaling technique (PST) for LTE-advanced/industry-specialized zero/low-IF receivers is presented. The proposed modulator consists of a loop filter with active-RC integrator configured as 3rd-order lowpass or 2nd-order complex bandpass architecture and 4-bit internal quantizer operating at 80MHz, 160MHz and 320MHz, respectively. A programmable differential current-steering DAC unit is adopted for high linearity. In LP mode, the excess loop delay is set to half the sampling period of the quantizer and an additional feedback DAC is used to maintain stability, which is not used in QBP mode. The modulator employs flexible high gain and high bandwidth amplifiers with PST to optimize power consumption among various modes. Implemented in 65nm CMOS, the modulator achieves 84.8/85.8/84.5dB SNDR, 94.9/94.1/94.6dB SFDR over 2.5/5/10-MHz signal bands in LP modes and 83.8/ 84.6dB SNDR, 94.3/96dB SFDR across 2.5/5-MHz bandwidth with programmable center frequencies of 2/4-MHz in QBP modes, respectively. Powered by a 1.2-V supply, the modulator consumes 1.8 to 4.2mW, which results in simulated FOMs of 15.5 to 27.8fJ/conversion.
Keywords :
CMOS analogue integrated circuits; Long Term Evolution; amplifiers; band-pass filters; digital-analogue conversion; low-pass filters; radio receivers; sampling methods; sigma-delta modulation; 2nd-order complex bandpass architecture; 3rd-order lowpass bandpass architecture; CMOS; CT LP ΣΔ modulator; LP mode; LTE-advanced zero/low-IF receivers; PST; QBP ΣΔ modulator; QBP modes; SFDR; SNDR; active-RC integrator; bandwidth 2.5 MHz; bandwidth 5 MHz; continuous-time quadrature bandpass sigma-delta modulator; feedback DAC; flexible high gain amplifiers; frequency 160 MHz; frequency 2 MHz; frequency 320 MHz; frequency 4 MHz; frequency 80 MHz; high bandwidth amplifiers; industry-specialized zero/low-IF receivers; internal quantizer; loop delay; loop filter; multimode reconfigurable wideband continuous-time lowpass sigma-delta modulator; power 1.8 mW to 4.2 mW; power consumption; power scaling technique; programmable center frequency; programmable differential current-steering DAC unit; sampling period; signal bands; simulated FOM; size 65 nm; voltage 1.2 V; Band pass filters; Bandwidth; Frequency modulation; Power demand; Receivers; Resistors;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6271930
