DocumentCode
3022233
Title
MRAM crossbar based configurable logic block
Author
Lakys, Yahya ; Zhao, Weisheng ; Klein, Jacques-Olivier ; Chappert, Claude
Author_Institution
IEF, Univ. Paris-Sud, Orsay, France
fYear
2012
fDate
20-23 May 2012
Firstpage
2945
Lastpage
2948
Abstract
Spintronics-based non-volatile storage devices promise great potential to be integrated in reconfigurable circuits to overcome the major hurdles related to conventional flash and SRAM memories, such as low logic density, high standby power and long (re) boot latency. In this paper, we describe a compact design of configurable logic block based on Magnetic RAM (MRAM) crossbar architecture. The logic density can be increased greatly (~5 times) compared to conventional designs; the standby power can be nearly zero thanks to the non-volatility of MRAM. Its high speed and power efficiency (~10.4 Tera-OPS/Watt in computing mode) are also demonstrated through mixed CMOS/Magnetic spice simulations. Fully dynamic reconfiguration through context switching is also studied, which could be achieved with low area overhead.
Keywords
MRAM devices; SRAM chips; magnetoelectronics; MRAM crossbar; SRAM memories; compact design; configurable logic block; conventional flash memories; fully dynamic reconfiguration; high standby power; long reboot latency; low logic density; magnetic RAM crossbar architecture; mixed CMOS/magnetic spice simulations; reconfigurable circuits; spintronics-based nonvolatile storage devices; Flip-flops; Sensors; Switches; Switching circuits; Table lookup; Context switching; Crossbar architecture; MRAM; MTJ; Non-Volatile; Spintronics;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271934
Filename
6271934
Link To Document