Title :
Exploiting negative quantum capacitance of carbon nanotube FETs for low power applications
Author :
Rahaman, Md Sajjad ; Chowdhury, Masud H.
Author_Institution :
Dept. of ECE, Univ. of Illinois at Chicago, Chicago, IL, USA
Abstract :
As conventional silicon-based CMOS technology is approaching its fundamental physical limits due to aggressive scaling, carbon nanotubes (CNTs) have been explored as promising candidates for both on-chip switching device and interconnect in post-Si nanoelectronics due to their superior current carrying and heat transfer capabilities. This paper investigates the prospect of bulk-modulated CNT field-effect transistors (CNTFETs) for low-power high-speed applications. It has been seen from atomistic density-functional theory (DFT) calculations that a negative quantum capacitance regime is achieved due to the one-dimensional (1D) screening of gate field in nanoscale CNTFETs. This unconventional negative quantum capacitance can be exploited to obtain a step-up voltage transformation at the gate of CNTFETs and, subsequently, sub-60mv/decade subthreshold swing. It is shown that a boosting efficiency greater than 2.2 is obtained at the gate of the CNTFETs.
Keywords :
carbon nanotube field effect transistors; density functional theory; low-power electronics; 1D gate field screening; atomistic DFT calculation; atomistic density-functional theory calculation; bulk-modulated CNT field-effect transistor; bulk-modulated CNTFET; heat transfer capability; low-power high-speed application; negative quantum capacitance; on-chip switching device; one-dimensional gate field screening; post-Si nanoelectronic interconnection; silicon-based CMOS technology; step-up voltage transformation; Boosting; CNTFETs; Integrated circuit interconnections; Logic gates; MOSFET circuits; Quantum capacitance;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6271955