• DocumentCode
    3023483
  • Title

    Scenario-oriented design for single chip heterogeneous multiprocessors

  • Author

    Paul, JoAnn M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
  • fYear
    2005
  • fDate
    4-8 April 2005
  • Abstract
    The design of next generation single chip computers may require the selection, programming and coordination of tens to hundreds of individual processing elements (PEs) of several or tens of heterogeneous types. This paper outlines differences in the design process for these next generation single chip systems from that of traditional designs. Then it focuses on a novel design strategy, scenario-oriented design (SOD). SOD is just one design strategy that arises because of the potential of considering applications, schedulers, and hardware as they interact to form a system instead of viewing them as separate design domains. By leveraging one against the other, the system and its design process can be optimized in new ways. This is made possible by reducing the modeling detail of each design domain within a system in high level simulation.
  • Keywords
    microprocessor chips; multiprocessing systems; scheduling; next generation single chip computer design; scenario-oriented design; single chip heterogeneous multiprocessor; Application specific integrated circuits; Bandwidth; Concurrent computing; Delay; Distributed computing; Hardware; Network-on-a-chip; Prognostics and health management; System-on-a-chip; USA Councils;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
  • Print_ISBN
    0-7695-2312-9
  • Type

    conf

  • DOI
    10.1109/IPDPS.2005.389
  • Filename
    1420144