Efficient design of scalable shared-memory packet switches

This paper presents a general model for optimizing buffer-bandwidth trade-offs in output-buffered packet switches. It also provides a framework for designing scalable shared-memory ATM switches. The general model is based on small-depth (truncated) switch fabrics which employ a self-routing mechanism, and shared-memory modules to optimize buffer utilization. Bandwidth optimization is achieved using a generalized model for unbuffered dilated banyan networks, while buffer allocation is optimized using output grouping shared-memory modules at the output. This model has two major advantages over the “growable switch”. First it simplifies the interconnect fabric by using self-routing truncated fabric and second it provides a general model which provides tremendous flexibility for optimizing buffer and bandwidth allocation to support different services. Performance of the truncated fat-banyan under uniform and bursty traffic conditions is presented