Title :
Analog MAP decoder for (8, 4) Hamming code in subthreshold CMOS
Author :
Winstead, Chris ; Jie Dai ; Woo Jin Kim ; Little, Scott
Author_Institution :
Dept. of Electr. Eng., Utah Univ., Salt Lake City, UT, USA
Abstract :
An all-MOS analog implementation of a MAP decoder is presented for the (8, 4) extended Hamming code. This paper describes the design and analysis of a tail-biting trellis decoder implementation using subthreshold CMOS devices. A VLSI test chip has recently returned from fabrication, and preliminary test results indicate accurate decoding up to 20 MBit/s
Keywords :
CMOS analogue integrated circuits; Hamming codes; VLSI; analogue processing circuits; decoding; (8, 4) Hamming code; 0 to 20 Mbit/s; VLSI test chip; all-MOS analog implementation; analog MAP decoder; subthreshold CMOS; subthreshold CMOS devices; tail-biting trellis decoder; Analog computers; BiCMOS integrated circuits; Bipolar transistors; Circuit testing; Decoding; Fabrication; Maximum a posteriori estimation; Threshold voltage; Turbo codes; Very large scale integration;
Conference_Titel :
Advanced Research in VLSI, 2001. ARVLSI 2001. Proceedings. 2001 Conference on
Conference_Location :
Salt Lake City, UT
Print_ISBN :
0-7695-1038-8
DOI :
10.1109/ARVLSI.2001.915556
