• DocumentCode
    3024295
  • Title

    Investigation of incorporating dielectric pocket (DP) on Vertical Strained-SiGe Impact Ionization MOSFET (VESIMOS-DP)

  • Author

    Saad, Ismail ; Zuhir, H. Mohd ; Pogaku, Divya ; Bakar, A. R. Abu ; Bolong, Nurmin ; Khairul, A.M. ; Ghosh, Bablu ; Ismail, Riyad ; Hashim, U.

  • Author_Institution
    Nano Eng. & Mater. (NEMs) Res. Group, Univ. Malaysia Sabah, Kota Kinabalu, Malaysia
  • fYear
    2012
  • fDate
    19-21 Sept. 2012
  • Firstpage
    249
  • Lastpage
    253
  • Abstract
    The Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET with Dielectric Pocket (VESIMOS-DP) has been successfully developed and analyzed in this paper. Due to the DP layer, improve stability of threshold voltage, VT was found for VESIMOS-DP device of various DP size ranging from 20nm to 80nm. The stability is due to the reducing charge sharing effects between source and drain region. However, the presence of DP layer has introduced another potential barrier in addition to δp+ triangular potential barrier. Thus, increased amount of gate source voltage for lowering both barriers and allows the electron to move from source to drain. Accordingly, slight different and consistency of VESIMOS-DP sub-threshold value as compared to VESIMOS has revealed to give advantages for incorporating DP layer near the drain end. Moreover, the DP layer has suppressed the parasitic bipolar transistor effect with higher breakdown voltage as compared to without DP layer.
  • Keywords
    MOSFET; bipolar transistors; impact ionisation; semiconductor device breakdown; silicon compounds; DP layer; SiGe; VESIMOS-DP; breakdown voltage; charge sharing effects; dielectric pocket; gate source voltage; parasitic bipolar transistor effect; potential barrier; source and drain region; stability; threshold voltage; vertical strained silicon germanium impact ionization; vertical strained-impact ionization MOSFET; Dielectrics; Doping; Impact ionization; MOSFET circuits; Silicon; Silicon germanium; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4673-2395-6
  • Electronic_ISBN
    978-1-4673-2394-9
  • Type

    conf

  • DOI
    10.1109/SMElec.2012.6417134
  • Filename
    6417134