DocumentCode :
302524
Title :
Asynchronous sampling of 2D arrays using winner-takes-all arbitration
Author :
Kalayjian, Zaven ; Waskiewicz, James ; Yochelson, Dan ; Andreou, Andreas G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
Volume :
3
fYear :
1996
fDate :
12-15 May 1996
Firstpage :
393
Abstract :
We describe a novel scheme for asynchronous communication of information out of two dimensional processing arrays. Our architecture employs analog Winner Takes All (WTA) circuits instead of digital binary-tree arbiters found in other designs. A small system that incorporates an array of 9×12 pixels has been fabricated in a 2μ, double polysilicon, double metal process. Experimental results verify system functionality with a full-handshaking communication cycle of 3 μs. The WTA circuits have been independently tested and their operation verified down to 18 ns
Keywords :
analogue processing circuits; array signal processing; asynchronous circuits; signal sampling; 18 ns; 2 micron; analog WTA circuit; asynchronous sampling; double polysilicon double metal process; full-handshaking communication cycle; information processing; two dimensional processing array; winner-takes-all arbitration; Adaptive arrays; Asynchronous communication; Bandwidth; Circuit testing; Computer architecture; Neuromorphics; Neurons; Phased arrays; Sampling methods; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
Type :
conf
DOI :
10.1109/ISCAS.1996.541616
Filename :
541616
Link To Document :
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