Title :
Temperature cycling and thermal shock correlation in DPAK & DSO packages
Author :
Lee Chai Ying ; Cheong Choke Fei
Author_Institution :
Infineon Technol. (M) Sdn. Bhd., Batu Berendam, Malaysia
Abstract :
Short time to market is important in ensuring the competitiveness of a new semiconductor product. With the need to pass the listed qualification reliability stress test, temperature cycling (TC) is one of the stress tests that required the most time. Therefore, in order to speed up the stress test duration of TC, an initiative to assess the possibility of replacing TC with thermal shock (TS) in development stage was proposed. TS apply the similar failure mechanism model of Coffin Manson as TC. The main differences of both tests used in this study were the medium of the test environment (air-to-air in TC & liquid-to-liquid in TS), dwell time, time to reach specified temperature and load transfer time. With the conscious of the differences, a correlation study of TC to TS was carried out using DPAK and DSO packages as test vehicles. Positive results were reported in this correlation for the defined failure mode of the de-lamination percentage (%) at the interfaces of die pad to EMC, die-attach to lead frame/die pad. As a conclusion, TC H condition is correlated to 2x TS and TC C condition for die pad de-lamination in DPAK and DSO packages. These have been implemented in development stage of a project.
Keywords :
competitive intelligence; delamination; digital storage oscilloscopes; electromagnetic compatibility; integrated circuit economics; integrated circuit packaging; microassembling; thermal shock; Coffin Manson; DPAK; DSO packages; TC C condition; TC H condition; TC stress test duration; TS; delamination percentage; die pad EMC interfaces; die-attach; dwell time; frame-die pad; load transfer time; market competitiveness; project development stage; qualification reliability stress test; semiconductor product; temperature cycling; test vehicles; thermal shock correlation; Correlation; Electromagnetic compatibility; Lamination; Materials; Microassembly; Reliability; Stress;
Conference_Titel :
Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4673-2395-6
Electronic_ISBN :
978-1-4673-2394-9
DOI :
10.1109/SMElec.2012.6417185