Design of a low voltage charge pump circuit for RFID tag

Author

Kang Cheng Wei ; Reaz, Mamun Bin Ibne ; Amin, Md Syedul ; Jalil, J. ; Rahman, L.F.

Author_Institution

Dept. of Electr., Electron. & Syst. Eng., Univ. Kebangsaan Malaysia, Bangi, Malaysia

fYear

2012

fDate

19-21 Sept. 2012

Firstpage

466

Lastpage

469

Abstract

Charge pump circuit is widely used in many systems due to its low power consumption, high performance, small area and low current drivability. This paper presents a low-voltage, high performance charge pump circuit suitable for low-voltage applications such as EEPROM of Radio Frequency Identification (RFID) tag. Designed in 0.18-μm CMOS process, the proposed charge pump circuit is able to pump an input voltage of 1.8V to a measured output of 5.95V through 20MHz clock signal with each pumping capacitor of 0.1pF and smoothing capacitor of 0.1pF at the output. Simulation result shows that the proposed charged pump circuit offers higher pumping gain compared with the existing charge pump circuit. Besides the RFID tag, the charge pump circuit can also be used in other memory circuits.

Keywords

CMOS integrated circuits; capacitors; charge pump circuits; radiofrequency identification; radiofrequency integrated circuits; CMOS process; EEPROM; RFID tag; capacitance 0.1 pF; clock signal; frequency 20 MHz; low power consumption; low voltage charge pump circuit design; memory circuits; pumping capacitor; radiofrequency identification tag; size 0.18 mum; smoothing capacitor; voltage 1.8 V; voltage 5.95 V; Charge pumps; EPROM; Layout; Nonvolatile memory; Radiofrequency identification; Threshold voltage; Voltage measurement; CMOS; EEPROM; NVM; RFID; charge pump;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4673-2395-6

Electronic_ISBN

978-1-4673-2394-9

Type

conf

DOI

10.1109/SMElec.2012.6417187

Filename

6417187