Title :
Time-precision flexible adder
Author :
Chamizo, Juan Manuel García ; Pascual, Jerónima Mora ; Mora, Higinio Mora
Author_Institution :
Departamento de Tecnologia Informatica y Computacion, Alicante Univ., Spain
Abstract :
A new conception of flexible calculation that allows us to adjust a sum depending on the available time computation is presented. More specifically, the objective is to obtain a calculation model that makes the processing time/precision more flexible. The addition method is based on carry-select scheme adder and the proposed design uses precalculated data stored in look-up tables, which provide, above all, quality results and systematization in the implementation of low level primitives that set parameters for the processing time. We report an evaluation of the architecture in area, delay and computation error, as well as a suitable implementation in FPGA to validate the design.
Keywords :
adders; carry logic; circuit complexity; field programmable gate arrays; table lookup; FPGA implementation; area estimations; carry-select scheme adder; computation error; delay error; flexible calculation model; look-up tables; number of iterations; precalculated data; time-precision flexible adder; Adders; Algorithm design and analysis; Arithmetic; Computer architecture; Costs; Delay; Field programmable gate arrays; Government; Sensor systems; Table lookup;
Conference_Titel :
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN :
0-7803-8163-7
DOI :
10.1109/ICECS.2003.1301676
