Pipelined FPGA design of the Goertzel algorithm for exon prediction

In this paper, we propose a novel architecture for implementing the Goertzel algorithm for exon prediction. Compared to previous designs, this one does not require multiple retransmissions which increase the number of clock cycles required to complete an operation. The proposed design is able to produce a new output on every clock cycle, which improves the throughput by roughly thirty times. The system was implemented on a Cyclone II FPGA located on the DE2 board. The FPGA is clocked at 50MHz and synthesis results show that the system requires 1172 logic elements (4% of total resources) and 12 embedded multipliers (17% of total resources). Tests using real genetic sequences show that the system produces the same results as with a MATLAB implementation and is able to successfully identify coding regions.