Rule-based testability rule check program

Author

Koseko, Yasushi ; Hiramine, Chie ; Ogihara, Takuji ; Murai, Shinichi

Author_Institution

Mitsubishi Electr. Corp., Kamakura, Japan

fYear

1990

fDate

17-19 Sep 1990

Firstpage

95

Lastpage

98

Abstract

A practical rule-based testability rule checker for VLSI testing adopting a tunable rule-base shell suited for rule checking is described. The checking process is divided into symbolic simulation and violation detection. The testability rules applied in the violation detection and the circuit primitive operation rules applied in the symbolic simulator are treated as rule bases. Circuit primitives and symbolic signal values described in the rules can also be predefined by testability rule engineers

Keywords

VLSI; circuit analysis computing; integrated circuit testing; knowledge based systems; VLSI testing; circuit primitive operation rules; rule-based testability rule checker; symbolic signal values; symbolic simulation; tunable rule-base shell; violation detection; Application specific integrated circuits; Circuit analysis; Circuit simulation; Circuit testing; Clocks; Complexity theory; Design engineering; Detectors; Tunable circuits and devices; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on

Conference_Location

Cambridge, MA

Print_ISBN

0-8186-2079-X

Type

conf

DOI

10.1109/ICCD.1990.130170

Filename

130170