Title :
Design of a memory-efficient IIR filter bank with application to subband coding of image and video signals
Author :
Li, Xiaojun ; Jiang, Zhongnong ; Willson, Alan N., Jr.
Author_Institution :
Integrated Circuits & Syst. Lab., California Univ., Los Angeles, CA, USA
Abstract :
An efficient IIR PR tree-structured filter bank for HDTV and video signal coding is investigated. Both the arithmetic complexity and the internal chip memory required for the decoder are considerably lower than those of existing FIR synthesis filter banks, while it provides comparable coding performance. Using modern CMOS technology, it is feasible to build the entire decoder on a single chip, thereby facilitating applications such as real-time decoding of compressed HDTV and video signals
Keywords :
CMOS digital integrated circuits; IIR filters; decoding; digital arithmetic; digital filters; digital signal processing chips; high definition television; image coding; real-time systems; video coding; CMOS technology; arithmetic complexity; coding performance; compressed HDTV signals; compressed video signal; decoder; image signals; internal chip memory; memory-efficient IIR filter bank; perfect reconstruction filters; real-time decoding; subband coding; tree-structured filter bank; video signals; CMOS technology; Decoding; Filter bank; Finite impulse response filter; HDTV; IIR filters; Image coding; Signal processing; Very large scale integration; Video compression;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541804
