A 1.8V–0.18µm CMOS lock-in amplifier for portable applications

This paper presents a new analog lock-in amplifier designed in a 0.18μm CMOS process with a single supply voltage of 1.8V. The proposed architecture, which recovers the signal of interest from noisy environments with errors below 4% for noise signals of the same amplitude as the signal of interest, is suitable for portable applications thanks to its reduced power consumption and single-supply voltage operation. Post-layout simulation results show a variable DC gain ranging from 20 to 40dB, input-referred noise of 28.3μmV_rms, power consumption of 351.4μW and area of (253×52)μm².