Identification of error mechanisms in a folding and interpolating ADC

This paper provides an error analysis for Folding and Interpolating (FAI) analog to digital converters, and presents a diagnostic tool for identifying likely causes for measured distortion. FAI converters are efficient since they require a smaller number of components than a classical flash architecture. They reduce both power consumption and die-size, while operating at frequencies comparable to fully parallel architectures. Error mechanisms causing output distortion are identified and explained, and an effective computer simulation module is created that allows error mechanisms to be emphasized or suppressed. For the FAI architecture, various anomalies in the construction of the device are shown to produce specific and identifiable characteristics of the converter´s behavior. These characteristics may be exploited in order to diagnose the possible causes of distortion which is observed for a particular device. Techniques are developed which allow measured converter characteristics to be used to isolate flaws, giving designers insight into required design or fabrication process modifications