Title :
TTL-CMOS input buffers with no static power dissipation
Author :
Vemuru, Srinivasa R
Author_Institution :
Dept. of Electr. Eng., City Coll. of New York, NY, USA
Abstract :
Two new implementations of CMOS input buffers that handle TTL level voltages with almost negligible static power dissipation are presented. These buffers reduce the output rising transition time by nearly 25% over existing buffer designs. The power dissipated during signal transitions is comparable or smaller under normal loading conditions
Keywords :
transistor-transistor logic; TTL level voltages; TTL-CMOS input buffers; negligible static power dissipation; Circuits; Cities and towns; Educational institutions; Hysteresis; Inverters; MOSFETs; Power dissipation; Power supplies; Propagation delay; Voltage;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541935
