• DocumentCode
    302718
  • Title

    TTL-CMOS input buffers with no static power dissipation

  • Author

    Vemuru, Srinivasa R

  • Author_Institution
    Dept. of Electr. Eng., City Coll. of New York, NY, USA
  • Volume
    4
  • fYear
    1996
  • fDate
    12-15 May 1996
  • Firstpage
    201
  • Abstract
    Two new implementations of CMOS input buffers that handle TTL level voltages with almost negligible static power dissipation are presented. These buffers reduce the output rising transition time by nearly 25% over existing buffer designs. The power dissipated during signal transitions is comparable or smaller under normal loading conditions
  • Keywords
    transistor-transistor logic; TTL level voltages; TTL-CMOS input buffers; negligible static power dissipation; Circuits; Cities and towns; Educational institutions; Hysteresis; Inverters; MOSFETs; Power dissipation; Power supplies; Propagation delay; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.541935
  • Filename
    541935
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=302718