DocumentCode
302724
Title
Write/verify free analog non-volatile memory using a neuron-MOS comparator
Author
Yamashita, Yuichiro ; Shibata, Tadashi ; Ohmi, Tadahiro
Author_Institution
Dept. of Electron. Eng., Tohoku Univ., Sendai, Japan
Volume
4
fYear
1996
fDate
12-15 May 1996
Firstpage
229
Abstract
We have developed an analog non-volatile memory technology for use in a neuron-MOS(νMOS) real-time event recognition system. The new cell structure enables us to monitor the memory cell content continuously during the writing operation, and the writing is automatically terminated when the cell content reaches the pre-determined target value. As a result, the time-consuming write/verify cycles usually required in conventional analog EEPROMs have become no more necessary. New comparator using νMOS is introduced for accurate termination of writing. Fundamental circuit action is experimentally verified by fabricated test circuits. A multiple memory cell configuration is also presented for achieving higher integration density, quick readout, and fast writing
Keywords
EPROM; MOS analogue integrated circuits; MOS memory circuits; analogue storage; comparators (circuits); neural chips; EEPROM circuit; multiple cell; neuron-MOS comparator; real-time event recognition; write/verify free analog nonvolatile memory; Circuit testing; Correlators; EPROM; Electrodes; Electrons; Nonvolatile memory; Real time systems; Tunneling; Voltage; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-3073-0
Type
conf
DOI
10.1109/ISCAS.1996.541942
Filename
541942
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