Title :
An eight bit adjustable modulo multiplier
Author :
Thomsen, Steven P. ; Albicki, Alexander
Author_Institution :
Dept. of Electr. Eng., Rochester Univ., NY, USA
Abstract :
The following discussion is for the development and synthesis of an 8×8 bit modulo multiplier which has a modulo range of 241-255, adjustable for each individual calculation performed. The circuit has been implemented and successfully simulated in VLSI 1.2 μm technology using IRSIM and in Altera´s FPGA with the circuit synthesis tool
Keywords :
VLSI; circuit analysis computing; cryptography; digital arithmetic; field programmable gate arrays; integrated circuit design; multiplying circuits; 1.2 mum; 8 bit; 8 bit adjustable modulo multiplier; Altera FPGA; IRSIM; VLSI 1.2 μm technology; circuit synthesis tool; cryptography; modulo range; Circuit simulation; Circuit synthesis; Convolution; Cryptography; Field programmable gate arrays; Logic; Read only memory; Security; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541969
