Detection and GPU accelerationof 3D FDTD algorithms based on memory access patterns

Author

Ran Shao ; Linton, D. ; Spence, Ivor ; Milligan, P. ; Ning Zheng

Author_Institution

Sch. of Electron., Electr. Eng. & Comput. Sci., Queen´s Univ. of Belfast, Belfast, UK

fYear

2013

fDate

20-22 Dec. 2013

Firstpage

2520

Lastpage

2526

Abstract

A semi-automatic tool is reported that first analyzes the sequential FDTD program to obtain memory access patterns and related features, and then optimizes the FDTD program with combined use of several types of CUDA memory on both Fermi and Kepler architecture GPUs. The experiments show a 13% and 18% speedup using Fermi and Kepler GPUs respectively compared to the GPU version program without optimization. Up to 142 times speedup is achieved compared to the sequential FDTD C program at a FDTD 3D mesh size of 250* 250* 250 (15.625 million mesh cells) with 10 layers CPML boundary conditions in 4096 time steps.

Keywords

finite difference time-domain analysis; graphics processing units; mathematics computing; mesh generation; parallel architectures; 3D FDTD algorithms; CPML boundary conditions; CUDA memory; FDTD 3D mesh size; Fermi architecture GPU; GPU acceleration; Kepler architecture GPU; convolutional perfect matching layer boundary conditions; finite-difference time-domain method; memory access patterns; semiautomatic tool; sequential FDTD C program; sequential FDTD program; Acceleration; Finite difference methods; Graphics processing units; Memory management; System-on-chip; Three-dimensional displays; Time-domain analysis; CUDA 5.0; FDTD; LLVM; Memory access pattern;

fLanguage

English

Publisher

ieee

Conference_Titel

Mechatronic Sciences, Electric Engineering and Computer (MEC), Proceedings 2013 International Conference on

Conference_Location

Shengyang

Print_ISBN

978-1-4799-2564-3

Type

conf

DOI

10.1109/MEC.2013.6885460

Filename

6885460