Title :
Optimum performance zero crossing digital phase locked loop using multi-sampling technique
Author :
Nasir, Qassim ; Al-Araji, Saleh R.
Author_Institution :
Dept. of EE & Comput. Eng., Univ. of Sharjah, United Arab Emirates
Abstract :
An optimum-performance Multi-Sampling Zero Crossing Digital Phase Lock Loop ( MS-ZCDPLL) with fast acquisition and wide locking range is presented in this work. While keeping the loop bandwidth fixed, the improved performance is achieved by increasing the Digital Controlled Oscillator (DCO) frequency so that the input is sampled more than once per cycle. ne proposed system was simulated under noise free as well as noisy conditions and shown to have improved acquisition and locking performance over the conventional loop without any system noise degradation.
Keywords :
digital filters; digital phase locked loops; phase noise; signal sampling; digital controlled oscillator frequency; digital filter order; fast acquisition; frequency offset; loop bandwidth; multisampling zero crossing digital phase lock loop; noisy conditions; optimum-performance digital phase lock loop; phase error noise variation; phase modifier; wide locking range; Bandwidth; Degradation; Digital filters; Educational institutions; Frequency; Oscillators; Phase locked loops; Sampling methods; System performance; Tracking loops;
Conference_Titel :
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN :
0-7803-8163-7
DOI :
10.1109/ICECS.2003.1301886