• DocumentCode
    3028955
  • Title

    Microprocessor realization of a linear predictive vocoder.

  • Author

    Hofstetter, E.M. ; Tierney, J. ; Wheeler, O.C.

  • Author_Institution
    M.I.T. Lincoln Laboratory, Lexington, MA, USA
  • Volume
    2
  • fYear
    1977
  • fDate
    28246
  • Firstpage
    421
  • Lastpage
    424
  • Abstract
    A microprocessor realization for a linear predictive vocoder is presented. The goal was a low power, low cost, compact special purpose realization of a narrowband speech terminal. The resultant design is a general purpose two bus structure running at a 150 ns cycle time using as the basic signal processing element four of the AMD 2901 CPE chips. This basic structure is augmented by a four cycle multiplier to allow for sufficient signal processing power. The design concessions that mark the LPCM as a special purpose machine designed to be a speech terminal are: limited I/O, and limited memory. The present design requires 162 dual-in-line packages, dissipates less than 45 watts and occupies about 1/3 cubic foot.
  • Keywords
    Algorithm design and analysis; Hardware; Logic; Microprocessor chips; Random access memory; Read only memory; Read-write memory; Registers; Transmitters; Vocoders;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '77.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1977.1170295
  • Filename
    1170295