Title :
Software Viterbi Decoder with SSE4 Parallel Processing Instructions for Software DVB-T Receiver
Author :
Tseng, Shu-Ming ; Kuo, Yu-Chin ; Ku, Yen-Chih ; Hsu, Yueh-Teng
Author_Institution :
Dept. of Electron. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Abstract :
In this paper, we discuss the procedures how to make Viterbi decoder faster. The implementation in Intel CPU with SSE4 parallel processing instruction sets and some other methods achieves the decoding speed 47.05 Mbps (0.64 Mbps originally). The DVB-T mode used in Taiwan needs 13.27 Mbps to achieve real-time reception, so our implementation of software Viterbi decoder takes only 28% CPU loading.
Keywords :
Viterbi decoding; digital video broadcasting; parallel processing; software radio; television receivers; SSE4 parallel processing; software DVB-T receiver; software Viterbi decoder; Bit error rate; Decoding; Digital video broadcasting; Distributed processing; Hardware; Parallel processing; Performance analysis; Software systems; Strontium; Viterbi algorithm;
Conference_Titel :
Parallel and Distributed Processing with Applications, 2009 IEEE International Symposium on
Conference_Location :
Chengdu
Print_ISBN :
978-0-7695-3747-4
DOI :
10.1109/ISPA.2009.100
