DocumentCode :
3029552
Title :
A simulation tool of parallel architectures for digital image processing applications based on DLX processors
Author :
Valero, V. ; Cuartero, F. ; Garrido, A. ; Quiles, F.
Author_Institution :
Dipartimento de Inf, Escuela Politecnica de Albacete, Spain
Volume :
3
fYear :
1995
fDate :
23-26 Oct 1995
Firstpage :
448
Abstract :
We present a simulation tool of parallel architectures for image digital treatment applications, which is characterized by the simulation of different architectures based on RISC DLX processors and an interconnection network based on wormhole routing. Each node is provided with a computational DLX processor and another of similar features, devoted to control the communication network
Keywords :
discrete event simulation; image processing; parallel architectures; reduced instruction set computing; software tools; telecommunication computing; telecommunication control; telecommunication networks; RISC DLX processors; communication network control; digital image processing applications; discrete event-driven simulation; interconnection network; multicomputer systems; parallel architectures; simulation tool; wormhole routing; Communication networks; Communication system control; Computational modeling; Computer architecture; Computer networks; Digital images; Multiprocessor interconnection networks; Parallel architectures; Reduced instruction set computing; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Image Processing, 1995. Proceedings., International Conference on
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-7310-9
Type :
conf
DOI :
10.1109/ICIP.1995.537668
Filename :
537668
Link To Document :
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