DocumentCode
303012
Title
A VLSI interval router for high-speed networks
Author
Christian, B.S. ; Zhang, C.N. ; Mason, R.
Author_Institution
Bell Northern Res., Ottawa, Ont., Canada
Volume
1
fYear
1996
fDate
26-29 May 1996
Firstpage
154
Abstract
In this work, a VLSI wormhole router for scalable high-speed networks including 2-D mesh, nearest-neighbor, and n-cube interconnected networks has been developed and implemented. The router is deadlock-free and guarantees to form the shortest paths. This VLSI router has been implemented and fabricated by using 1.2 μ CMOS4S standard cell library consisting of 65,000 gates. The performance of the VLSI router is measured and modeled
Keywords
CMOS digital integrated circuits; VLSI; circuit layout CAD; integrated circuit layout; logic CAD; multiprocessor interconnection networks; network routing; 1.2 micron; 2D mesh networks; CMOS4S standard cell library; VLSI interval router; deadlock-free router; high-speed networks; n-cube interconnected networks; nearest-neighbor networks; scalable high-speed networks; wormhole router; Computer science; Delay; Electronic equipment testing; Electronics packaging; High-speed networks; Libraries; Routing; System recovery; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1996. Canadian Conference on
Conference_Location
Calgary, Alta.
ISSN
0840-7789
Print_ISBN
0-7803-3143-5
Type
conf
DOI
10.1109/CCECE.1996.548060
Filename
548060
Link To Document