Title :
A scheme for pseudo-exhaustive test generation in the repairable programmable arrays
Author :
Goel, A.K. ; Misra, N.
Author_Institution :
Dept. of Electr. Eng., Michigan Technol. Univ., Houghton, MI, USA
Abstract :
A scheme for testability is proposed which incorporates spare allocation of rows and columns for fault location and reconfiguration. This technique efficiently locates a fault and repairs it resulting in a significant increase in the yield performance of a PLA. A pseudo-exhaustive scheme of test generation is used
Keywords :
automatic test software; design for testability; fault diagnosis; fault location; integrated circuit reliability; integrated circuit testing; logic CAD; logic testing; programmable logic arrays; redundancy; PLA testing; fault location; pseudo-exhaustive test generation; reconfiguration; repairable programmable arrays; spare column allocation; spare row allocation; testability scheme; Circuit faults; Circuit testing; Fault diagnosis; Fault location; Logic design; Programmable logic arrays; Reconfigurable logic; Shift registers; Switches; Very large scale integration;
Conference_Titel :
Electrical and Computer Engineering, 1996. Canadian Conference on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-3143-5
DOI :
10.1109/CCECE.1996.548065
