12 GHz wireless clock delivery using on-chip antennas: A case for future intra/inter-chip wireless interconnect

A wireless clock delivery technique using on-chip antennas is presented in this paper for future microprocessors. The realized system comprises a transmitter and several receivers integrated with on-chip antennas. The transmitter sends high frequency wireless clock by transmitting antenna which is picked up by receivers through receiving antennas. Simulations combining RF circuits with antennas are performed. The total chip area of transmitter and receiver including on-chip antennas and pads is 1 mm² and 1.33 mm², respectively. For a transmitter-receiver pair separated by 3 mm, the simulated peak-peak jitter of local clock is 6.8 ps. The performance of our wireless clock distribution is comparable with that of other novel clock distributions, which is even better in terms of jitter.