Test architecture of the Motorola 68040

The 68040 is a third generation 32-bit microprocessor that implements the 68000 family instruction set. The philosophy for the design for test (DFT) effort on the 68040 is to address each class of logic in a different manner. In it there is the typical breakdown of data paths, ROM/PLA structures, embedded RAMs, random logic (sequential and nonsequential), and finite state machines. In each of these areas a different DFT style is used. The test logic architecture that is implemented to allow more thorough test coverage is discussed. The different test modes of the chip are detailed. In order to assist the customer in board-level testing, the 68040 implements the IEEE 1149.1 (JTAG) interface. Also discussed are the Motorola additions to the JTAG interface