Title :
Design and implementation of an asynchronous arbiter circuit using SET CMOS hybrid architecture approach
Author :
Dutta, Pranab Kishore ; Singh, N. Basanta ; Jain, Amit ; Sarkar, Subir Kumar
Author_Institution :
North Eastern Regional Inst. of Sci. & Technol., Electron. & Commun. Eng., Itanagar, India
Abstract :
This paper demonstrates a CMOS Single electron transistor (SET) hybrid arbiter circuit which will act like a communication switch between multiple resources. The proposed architecture combines the merits of CMOS and SET to give a more efficient and compact nanometer scale circuit. The designed arbiter circuit utilizes the Coulomb blockade oscillation characteristics of SET to give better performances in terms of circuit area, power dissipation and delay. MIB compact model and BSIM4.6 model is used to design the circuit and the functionality of the result is verified by Tanner spice simulator.
Keywords :
CMOS integrated circuits; asynchronous circuits; logic design; nanoelectronics; single electron transistors; BSIM4.6 model; Coulomb blockade oscillation characteristic; MIB compact model; SET CMOS hybrid architecture approach; Tanner SPICE simulator; asynchronous arbiter circuit; hybrid arbiter circuit; nanometer scale circuit; power dissipation; single electron transistor; CMOS integrated circuits; Delays; Integrated circuit modeling; Logic gates; MOSFET; Semiconductor device modeling; Single electron transistors; Arbiter; Hybrid circuit; Single Electron Transistor; Tanner spice;
Conference_Titel :
Computing, Communication & Automation (ICCCA), 2015 International Conference on
Conference_Location :
Noida
Print_ISBN :
978-1-4799-8889-1
DOI :
10.1109/CCAA.2015.7148610
