A 5GHz CMOS digitally controlled oscillator with a 3GHz tuning range for PLL applications

A 16-bit digitally controlled CMOS oscillator (DCO) is described. This CMOS DCO design provides improved phase noise characteristics. Simulations of a 4-stage DCO using a 0.18μm TSMC CMOS process parameters achieved a controllable frequency range of 1.78GHz - 4.8GHz with a monotone tuning range of around 3GHz. Worst-case jitter due to digital control transitions at pathological control-word boundaries for the CMOS DCO was observed to be less than 100 ps. This CMOS design would thus provide considerable performance enhancement in digital PLL applications.