DocumentCode
3031295
Title
Derivation of signal flow direction in MOS VLSI: an alternative
Author
De Rammelaere, W. ; Bolsens, I. ; Claesen, L. ; De Man, H.
Author_Institution
IMEC Lab., Leuven, Belgium
fYear
1990
fDate
17-19 Sep 1990
Firstpage
206
Lastpage
209
Abstract
Novel rules to derive the signal flow in a VLSI-design are presented. This method is based on design-style independent logical principles, which makes it suitable for circuits that have not been checked on their electrical correctness. The use of two global principles has an important influence for more complicated designs, but also results in an efficiency penalty which may be kept reasonable by introducing graph reduction rules and heuristics. The different steps in the tagging process are explained and illustrated with examples. The dataflow rules are integrated in the overall DIALOG system to perform electrical verification, and they offer an invaluable help to break up the verification problem in subproblems and to cope with feedback in designs, by introducing the concept of intended unilateral blocks
Keywords
MOS integrated circuits; VLSI; circuit analysis computing; MOS VLSI; VLSI-design; dataflow rules; design-style independent logical principles; efficiency penalty; electrical correctness; electrical verification; graph reduction rules; intended unilateral blocks; signal flow; tagging process; Circuits; Design automation; Inverters; Logic design; MOSFETs; Signal design; Switches; Tagging; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-2079-X
Type
conf
DOI
10.1109/ICCD.1990.130203
Filename
130203
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