• DocumentCode
    303133
  • Title

    Design considerations for a 7 kV/3 kA GTO with transparent anode and buffer layer

  • Author

    Eicher, S. ; Bauer, F. ; Zeller, H.R. ; Weber, A. ; Fichtner, W.

  • Author_Institution
    Integrated Syst. Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland
  • Volume
    1
  • fYear
    1996
  • fDate
    23-27 Jun 1996
  • Firstpage
    29
  • Abstract
    Using a novel concept for the anode of GTO devices, the authors have developed, manufactured, and characterized full scale 4.5 kV/3 kA GTO thyristors. Utilizing a buffer layer and a transparent anode, these devices have extremely low conduction and switching losses. In this work, simulation results of 7 kV/3 kA GTO structures with a homogeneous transparent anode and a buffer layer are presented. By applying the design criteria given in the paper, 7 kV/3 kA GTO structures can be proposed, which have on-state and conduction losses comparable to those of state-of-the-art 4.5 kV/3 kA GTO thyristors
  • Keywords
    anodes; design engineering; losses; semiconductor device models; semiconductor device testing; thyristors; 3 kA; 7 kV; GTO thyristors; buffer layer; characterisation tests; conduction losses; design considerations; design criteria; homogeneous transparent anode; manufacture; on-state losses; simulation; switching losses; Anodes; Art; Buffer layers; Doping profiles; Laboratories; Semiconductor device manufacture; Substrates; Switching loss; Thyristors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Specialists Conference, 1996. PESC '96 Record., 27th Annual IEEE
  • Conference_Location
    Baveno
  • ISSN
    0275-9306
  • Print_ISBN
    0-7803-3500-7
  • Type

    conf

  • DOI
    10.1109/PESC.1996.548555
  • Filename
    548555