DocumentCode :
3032248
Title :
SYLON-REDUCE: an MOS network optimization algorithms using permissible functions
Author :
Limqueco, Johnson Chan ; Muroga, Saburo
Author_Institution :
Dept. of Comput Sci., Illinois Univ., Urbana, IL, USA
fYear :
1990
fDate :
17-19 Sep 1990
Firstpage :
282
Lastpage :
285
Abstract :
An algorithm, SYLON-REDUCE, that uses the concept of permissible functions to optimize an MOS network directly is presented. SYLON-REDUCE uses a more coherent, algorithmic approach, adapting the MOS cell synthesis procedure of algorithm DIMN, to resynthesize the cells in the network. Better networks can be obtained for most functions. It is shown that technology-specific synthesis and optimization can produce better results than dividing synthesis into technology-independent and technology-mapping phases
Keywords :
MOS integrated circuits; integrated circuit testing; logic design; logic testing; optimisation; MOS cell synthesis; MOS network optimization algorithms; SYLON-REDUCE; algorithm; permissible functions; technology independent phases; technology-mapping phases; technology-specific synthesis; Algorithm design and analysis; Application specific integrated circuits; Boolean functions; Computer science; Design optimization; Logic design; Logic gates; Network synthesis; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
Type :
conf
DOI :
10.1109/ICCD.1990.130227
Filename :
130227
Link To Document :
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