Current-mode techniques for analog VLSI: technology and defect tolerance issues

Author

Andreou, A.G.

Author_Institution

Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD

fYear

1991

fDate

18-20 Nov 1991

Firstpage

Lastpage

Abstract

Future large scale analog computational systems will have to cope with manufacturing defects and mismatch in individual components. The author argues that current-mode design techniques, and in particular minimal designs at the transistor level are consistent with future manufacturing requirements for wafer scale analog systems

Keywords

VLSI; analogue computer circuits; fault tolerant computing; linear integrated circuits; WSI; analog VLSI; current-mode design techniques; defect tolerance issues; large scale analog computational systems; manufacturing defects; manufacturing requirements; minimal designs; mismatch in individual components; transistor level; wafer scale analog systems; Analog computers; Biology computing; Circuit faults; Computer aided manufacturing; Geometry; Information processing; Large-scale systems; Space technology; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance on VLSI Systems, 1991. Proceedings., 1991 International Workshop on

Conference_Location

Hidden Valley, PA

ISSN

1550-5774

Print_ISBN

0-8186-2457-4

Type

conf

DOI

10.1109/DFTVS.1991.199942

Filename

199942

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3032391