• DocumentCode
    3032783
  • Title

    A method for the consistent reporting of fault coverage

  • Author

    Debany, Warren H. ; Kwait, K.A. ; Al-Arian, Sami A.

  • Author_Institution
    Rome Lab., RL/ERDA, Griffiss AFB, NY, USA
  • fYear
    1991
  • fDate
    18-20 Nov 1991
  • Firstpage
    195
  • Lastpage
    198
  • Abstract
    A standard procedure has been developed for fault coverage measurement. Procedure 5012 of MIL-STD-883 governs the reporting of fault coverage for digital microcircuits for military applications. It describes requirements for the development of the logic model for an IC, fault universe, fault simulation, and reporting of results. Procedure 5012 provides a consistent means of measuring fault coverage for an integrated circuit regardless of the specific logic and fault simulator used. It addresses the testing of complex, embedded structures that are not implemented in terms of logic gates, such as RAMs, ROMs, and PLAs. Fault coverages for gate-level and non-gate-level structures are weighted by transistor counts to arrive at an overall fault coverage value. The procedure addresses built-in-self-test based on the use of linear feedback shift registers for output data compaction. Two fault sampling procedures are permitted. A Fault Simulation Report documents the fault coverage level obtained, as well as the assumptions, approximations, and methods used
  • Keywords
    digital integrated circuits; integrated circuit testing; logic testing; military equipment; standards; Fault Simulation Report; MIL-STD-883; Procedure 5012; built-in-self-test; consistent reporting; digital microcircuits; embedded structures; fault coverage measurement; fault coverage reporting; fault sampling procedures; fault simulation; fault universe; linear feedback shift registers; logic model; method; output data compaction; standard procedure; Circuit faults; Circuit simulation; Circuit testing; Integrated circuit measurements; Integrated circuit modeling; Logic circuits; Logic gates; Logic testing; Measurement standards; Standards development;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance on VLSI Systems, 1991. Proceedings., 1991 International Workshop on
  • Conference_Location
    Hidden Valley, PA
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-2457-4
  • Type

    conf

  • DOI
    10.1109/DFTVS.1991.199964
  • Filename
    199964