DocumentCode
303319
Title
Neuromorphic analog communication
Author
Marienborg, Jan-Tore ; Lande, Tor Sverre ; Hovin, Mats ; Abusland, Ånen
Author_Institution
Dept. of Inf., Oslo Univ., Norway
Volume
2
fYear
1996
fDate
3-6 Jun 1996
Firstpage
920
Abstract
A recurring topic concerning neural nets implemented in VLSI is chip to chip communication and chip to computer communication. One common approach is the asynchronous event protocol, where an asynchronous digital bus is transferring “neural spikes” as events. Since neural circuits are spiking randomly, a collision strategy must be adopted preserving the statistical properties of the neural representation. This paper describes the methodology and theory behind an approach preserving and taking advantage of the statistical properties of the pulses. It describes a bus encoding scheme with 100% collision detection and a proposed implementation of a simple arbitration circuit implemented with event aging and a CSMA collision strategy. Some simulation results are included
Keywords
VLSI; analogue integrated circuits; analogue processing circuits; carrier sense multiple access; data communication; neural chips; CSMA collision strategy; VLSI; arbitration circuit; asynchronous digital bus; asynchronous event protocol; bus encoding scheme; chip-to-chip communication; chip-to-computer communication; collision detection; collision strategy; event aging; neural nets; neural spikes; neuromorphic analog communication; statistical properties; Aging; Circuits; Encoding; Informatics; Neural networks; Neuromorphics; Neurons; Stochastic processes; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1996., IEEE International Conference on
Conference_Location
Washington, DC
Print_ISBN
0-7803-3210-5
Type
conf
DOI
10.1109/ICNN.1996.549020
Filename
549020
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