Title :
Design and implementation of neural network logic circuits with global convergence
Author :
Ninomtya, H. ; Egawa, Kunitaka ; Kamio, Takeshi ; Asai, Hideki
Author_Institution :
Fac. of Eng., Shizuoka Univ., Hamamatsu, Japan
Abstract :
This paper describes a novel technique to realize high performance digital sequential circuits composed of Hopfield neural networks. For an example of applications of neural networks to logic circuits, a novel gate circuit, full adder circuit and latch circuit using neural networks, which have the global convergence property, are proposed and implemented on breadboard. Here, global convergence means that the energy function is monotonically decreasing and each circuit always operates correctly independently of the initial values. Finally the several digital sequential circuits such as shift register and asynchronous binary counter are designed and verified
Keywords :
Hopfield neural nets; adders; circuit CAD; convergence; flip-flops; logic gates; sequential circuits; shift registers; Hopfield neural networks; adder circuit; asynchronous binary counter; digital sequential circuits; energy function; full adder circuit; gate circuit; global convergence; latch circuit; logic circuits; shift register; Adders; Application software; Convergence; Design engineering; Hopfield neural networks; Latches; Logic circuits; Neural networks; Sequential circuits; Shift registers;
Conference_Titel :
Neural Networks, 1996., IEEE International Conference on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3210-5
DOI :
10.1109/ICNN.1996.549030