Title :
New CoSi/sub 2/ SALICIDE technology for 0.1 /spl mu/m processes and below
Author :
Wang, Q.F. ; Maex, K. ; Kubicek, S. ; Jonckheere, R. ; Kerkwijk, B. ; Verbeeck, R. ; Biesemans, S. ; De Meyer, K.
Author_Institution :
IMEC, Leuven, Belgium
Abstract :
A new CoSi/sub 2/ salicide technology with thin Ti capping layer has been developed to improve the formation and thermal stability of sub-0.1 /spl mu/m CoSi/sub 2//Poly stacks. Previously both Co/Ti and conventional processes have been used successfully to produce 0.1 /spl mu/m lines. However, the former technique has a wider process window to obtain uniform silicide films reproducibly.
Keywords :
CMOS integrated circuits; cobalt compounds; integrated circuit metallisation; thermal stability; 0.1 micron; CoSi/sub 2/ salicide technology; CoSi/sub 2/-Si; polysilicon; reproducible uniform silicide films; thermal stability; thin Ti capping layer; Annealing; Electrical resistance measurement; Furnaces; Paper technology; Silicides; Space technology; Surface resistance; Temperature distribution; Thermal stability; Very large scale integration;
Conference_Titel :
VLSI Technology, 1995. Digest of Technical Papers. 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7803-2602-4
DOI :
10.1109/VLSIT.1995.520838
