DocumentCode :
3034807
Title :
Efficient implementation of one and two dimensional digital signal processing algorithms on a multi-processor architecture
Author :
Barnwell, T. ; Gaglio, S. ; Hodges, C. J N
Author_Institution :
Georgia Institute of Technology, Atlanta, Georgia
Volume :
4
fYear :
1979
fDate :
28946
Firstpage :
698
Lastpage :
701
Abstract :
This paper describes the features of a multimicroprocessor architecture for digital signal processing. The use of a multiport optical memory as a design component, along with the synchronous operation of the processors, allows particularly efficient implementation for one and two dimensional finite impulse response and infinite impulse response filters. This paper also describes an approach to the automatic generation of efficient code for the multi-microprocessor architecture being implemented for a class of linear DSP algorithms.
Keywords :
Concurrent computing; Counting circuits; Digital signal processing; Equations; Fires; Kernel; Processor scheduling; Signal processing algorithms; Sun;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '79.
Type :
conf
DOI :
10.1109/ICASSP.1979.1170628
Filename :
1170628
Link To Document :
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