• DocumentCode
    3035636
  • Title

    Understanding the performance of concurrent error detecting superscalar microarchitectures

  • Author

    Smolens, Jared C. ; Kim, Jangwoo ; Hoe, James C. ; Falsafi, Babak

  • Author_Institution
    Comput. Archit. Lab., Carnegie Mellon Univ., Pittsburgh, PA
  • fYear
    2005
  • fDate
    21-21 Dec. 2005
  • Firstpage
    13
  • Lastpage
    18
  • Abstract
    Superscalar out-of-order micro architectures can be modified to support redundant execution of a program as two concurrent threads for soft-error detection. However, the extra workload from redundant execution incurs a performance penalty due to increased contention for resources throughout the datapath. We present four key parameters that affect performance of these designs, namely 1) issue and functional unit bandwidth, 2) issue queue and reorder buffer capacity, 3) decode and retirement bandwidth, and 4) coupling between redundant threads´ instantaneous resource requirements. We then survey existing work in concurrent error detecting superscalar micro architectures and evaluate these proposals with respect to the four factors
  • Keywords
    computer architecture; error detection; multi-threading; redundancy; system recovery; concurrent error detecting superscalar microarchitectures; redundant execution; soft-error detection; Bandwidth; Circuit noise; Computer errors; Decoding; Logic circuits; Microarchitecture; Out of order; Pipelines; Retirement; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and Information Technology, 2005. Proceedings of the Fifth IEEE International Symposium on
  • Conference_Location
    Athens
  • Print_ISBN
    0-7803-9313-9
  • Type

    conf

  • DOI
    10.1109/ISSPIT.2005.1577062
  • Filename
    1577062