Toward a processor core for real-time capable autonomic systems

This paper proposes a processor core that allows to support the autonomic computing principles in embedded hard-real-time systems. The simultaneous multithreaded CAR-core processor features hardware-integrated scheduling schemes that isolate the hard-real-time thread from non-real-time threads. It is binary compatible with Infineon´s TriCore processor and designed as IP core for a system-on-chip. The challenge for the processor design is to implement simultaneous multithreading such that a thread cannot influence the timing behavior of another thread in order to allow predictable thread execution times. Therefore new instruction issue and data memory access techniques are proposed. The autonomic computing requirements shall be implemented by autonomic managers running as helper threads in own thread slots concurrent to the real-time application. The autonomic manager threads monitor the application and decide if self-configuration, self-healing, self-optimization, or self-protection must be triggered